Sequential Logic circuit

 What is Sequential Logic?

Sequential logic is some kind of binary circuit design that works with one or more inputs and one or more outputs. In the sequential logic circuit, their states are dependent on defined rules and also previous states. Each of the inputs and output(s) can logic "0" or logic "1". The Sequential circuits are normally combinational circuits with the additional properties of storage and feedback.

General Form of Sequential Logic







Classification of Sequential Logic








Asynchronous Circuit







The asynchronous circuit is a sequential digital logic circuit that is not governed by a clock circuit or global clock signal. Instead, it often uses signals that indicate the completion of instructions and operations specified by simple data transfer.


Synchronous Circuit








The synchronous circuit is a digital circuit that the state of memory elements is synchronized by a clock signal. In a sequential digital logic, circuit data is stored in memory devices called flip-flops or latches.


SR Latches Using NAND Gate

SR Latch Circuit Creation

               

Truth Table of SR Latch

                

  • First, the logic level of R is low (R=0) and the logic level of S is HIGH (S=1). Then Bottom NAND gate has at least one input of logic level LOW(0), therefore its output Q bar must be logic level HIGH (1). Then, the output of Q bar logic level HIGH(1) will be set to top NAND gate input as feedback, and therefore its output Q must be at logic level LOW(0). Then after the state of R changes to logic level HIGH(1) and also S remaining at logic level HIGH(1). If change the other input level of bottom NAND Gate there is still remaining inputs 1 and 0. Since one input is logic level LOW(0),there is no change of state.  
  • Secondly, the logic level of R is HIGH (R=1) and the logic level of S is LOW (S=0). Then TOP NAND gate has at least one input of logic level LOW(0), therefore its output Q must be logic level HIGH (1). Then, the output of Q logic level HIGH(1) will be set to bottom NAND gate input as feedback, and therefore its output Q bar must be at logic level LOW(0).Then after the state of S changes to logic level HIGH(1) and also R remaining at logic level HIGH(1). If change the other input level of top NAND Gate there is still remaining inputs 1 and 0. Since one input is logic level LOW(0),there is no change of state. 
  • Then, the logic level of R is HIGH (R=1) and the logic level of S is HIGH (S=1). The logic level of both inputs are HIGH consider it as a memory condition in the circuit. When the logic level of R is LOW (R=0) and the logic level of S is LOW (S=0), output gives as  HIGH both states so it consider as a error condition in the circuit. 


SR Latches Using NOR Gate

SR Latch Circuit Creation

                  


Truth Table of SR Latch

                  




What is a Flip - Flop?


The flip flop is an electronic circuit with two stable states which is used to store binary data. Using varying input stored values can be changed. Flip-flops are the basics of digital electronics systems used in electronic systems. The flip flop is one of the basic storage elements in sequential logic.


S-R Flip-Flop








S-R Flip flops are an application of logic gates and also an SR flip-flop circuit can remain in a binary state until directed by an input signal to switch states. S-R flip-flop stands for SET-RESET flip-flops. These flip-flops are also called S-R Latch.

S-R Flip-Flop Circuit Creation

                 

Truth Table of the S-R Flip-Flop

                 


The Timing Diagram of the S-R Flip-Flop


               




J-K Flip-Flop







The J-K flip-flop is the most versatile of the basic flip-flops. It has the two inputs with the clock and those are labeled J , K and, CLK. If J and K are different then the output Q takes the value of J at the next clock edge.

J-K Flip-Flop Circuit Creation

                


Truth Table of the J-K Flip-Flop

                


Applications of Flip-Flops

  • Frequency Dividers
  • Counters
  • Shift Registers
  • Bounce elimination switch
  • Data storage
  • Storage Registers
  • Data transfer
  • Latch

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